Research at Cookson Electronics / CPS and CSPM

An Investigation Into Stencil Manufacturing Processes and Their Effect on Solder Paste Release

The purpose of this research grant is to propose work to assist Cookson Electronics into the research of stencil manufacturing processes and their effect on solder deposition quality. While the solder deposition process has always been a vital step in the overall quality of PCB assemblies, the move to finer pitches, combined with new material systems (no clean fluxes, lead-free solders, etc.) makes the process even more challenging. Stencils for surface mount assembly can have their apertures formed by processes such as ¡°chemical etching¡± and ¡°laser cutting¡±. The objectives of this project are to characterize the different types of stencil manufacturing processes by use of designed experiments (DOE) for evaluating the print (i.e., solder deposition) quality. It is expected that the DOE will incorporate a variety of factors like different solder paste compositions, different stencils (considering manufacturing methods) and, perhaps, different surface finish types of the printed circuit board (among other suggestions). Further studies to be included (and as desired by the industry directors) will likely consist of activities related to fundamental physics studies of the materials. For example, this may include studying the paste release of the solders through the different types of manufactured stencils; with a possible goal of correlating paste composition (i.e., particle size, flux, etc.) with the quality of the print.

Reliability Analyses of Printed Circuit Boards Assembled with Lead-Free Solder Alloys

Lead-based solders have long since been the predominant attachment metallurgy for electronics assembly. Even though the electronics industries account for about 1% of lead (Pb) use, there have been increased pressures (both internationally and nationally) to try to eliminate lead for environmental reasons. Different companies are now proposing alternative lead-free materials for use in electronics assembly. The problem is that, unlike traditional lead-based solders wherein a wealth of processing and reliability data exists, relatively little is known about the use of these new lead-free alloys. The purpose of this research grant is to propose work to assist Cookson Electronics to identify gaps in lead-free processing information and to recommend and perform experimental research to try to fill said gaps. A prior research effort has developed a set of test vehicles different groups of which having been assembled using specific lead-free solder alloys. Post-processing visual inspections of these assemblies have been performed in the prior work. The purpose of this project is to perform the extensive reliability studies on the as-assembled test vehicles.

Designed Experiments to Evaluate Sphere Attach Processes for Area Array Components

The sphere attach process for area array components (like Ball Grid Arrays (BGAs) and Chip Scale Packages (CSPs)) is critical to the component's reliability. This work proposes to study the following two different sphere attach processes: a conventional gravity-drop method, and a positive placement method. Both methods will be performed via the use of Speedline Technologies ¨C CAMALOT Matrix machine. Effects of sphere diameter size and solder alloy composition (considering the conventional 63Sn/37Pb lead-based system versus a generic lead-free system to be decided upon by the sponsor) will be studied. This project will be performed cross-disciplinary in that it will involve all the major divisions of Cookson Electronics, namely, Cookson Performance Solutions (CPS), Speedline Technologies (equipment sets), Alpha-Fry Technologies (solder pastes and stencils), and Polyclad Technologies (surface finishes). Though the work will be a cross-sectored approach, the research will be conducted at the CPS Process Development facilities in Foxborough, Massachusetts.