Masters Abstracts (1999)

JOSHI, MUKUL
(December 1999), Process & Material's Development Engineer, LSI Logic, Milpitas, CA

Email: mujoshi@lsis.com

Encapsulant selection and Reliability issues in Flip Chip assemblie

The electronics packaging industry is moving towards higher density packages to cope with market driven needs for increased product functionality and the consequent rise in component Input/Output (I/O) numbers. Flip chip technology, which involves mounting the bare die or dice directly onto the Printed Circuit Board (PCB) with solder bumps as interconnections, offers an attractive solution in terms of reduced size, cost, increased quality, and package reliability. Circuit densification can be increased because no intermediate chip packaging or lead frame is required and the whole area under the chip can be used for I/O interconnections. In addition, better electrical performance is expected due to the shorter interconnect length. Continued research in flip chip technology indicates that inspite of numerous studies and significant findings, the technology is still far from being 'optimized'. This thesis identifies the major process steps in the flip chip assembly process, the associated issues, and the possible solutions. This research effort evaluated the effect of certain important process development related issues (delamination, voids, fillet thickness, fillet cracking, encapsulant and flux compatibility, encapsulant wetting, and die cracking) and their impact on reliability. The focus was to identify the process windows and material combinations that would result in reliable flip chip assemblies. The selection of materials thus becomes increasingly critical as the material requirements are often interrelated. The underfilling operation is a critical step in the flip chip assembly process. Defects in the underfilling process, such as the presence of voids, can influence the reliability of the assembly while in service. The choice of encapsulant was found to be very sensitive to the material properties of the encapsulants, and the application scenario. This research also emphasizes the criteria that need to be considered when selecting an 'ideal' encapsulant for flip chip assemblies in a specific application scenario.